|ECE/CS 757 Advanced Computer Architecture II|
Last modified Wednesday, 03-May-2017 12:56:37 CDT
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Office: 3621 Engineering Hall
Office Hours: Tues 10-12am, Fri 9:30-11:30am
Email: mikko at engr.wisc.edu
This course covers parallelism and the design of parallel computers. Historically, parallel computers have been designed for the sole purpose of quickly solving large-scale computational problems like weather forecasting or molecular modeling (to name just two examples). These problems are usually expressed as a series of floating-point computations of large data sets stored in multidimensional arrays, and can usually be partitioned across multiple processors to achieve large-scale parallelism. However, within the last fifteen years, new applications for parallel computers have eclipsed these traditional numeric codes, and are the driving force behind the tremendous volume and revenue growth in the marketplace for parallel computers. These applications span all the way from commercial server workloads that run in managed datacenters, to heavily-threaded games and web browsers running on PCs and laptops, to massively data-parallel applications like graphics rendering. In other words, parallelism in applications and in hardware has become pervasive in our industry.
This course will study the nature of parallelism across these application domains, as well as the hardware required to support parallel execution. We will investigate techniques for detecting, increasing, and exploiting parallelism across this spectrum of workloads, and will study in detail the design of various components of parallel computer systems. The discussion will rely heavily on examples of real or proposed parallel designs.
Prerequisites: ECE 552 (or equivalent) and CS 537 (not strictly enforced). NOTE: ECE 752 is not a prerequisite for this course.Refer to the course syllabus for additional details
There is no required textbook; we will rely on readings from the literature and other online resources. This book is a useful additional reference "Parallel Computer Organization and Design" by M. Dubois, M. Annavaram, and P. Stenström..
Here is the course bibliography.
Guidelines for paper reviews.
|1/18, 1/20||Introduction||Skim , Read , |
|1/23, 1/25||In-class gem5 tutorial||Review |
|1/27||Cores, multithreading, multicore||Skim , Read  & |
|2/1,2/3||Cores, multithreading, multicore cont'd||Skim , Read  & |
|2/6, 2/8||Lecture cancelled|
|2/10||MP Software||Skim , Read , Review |
|2/13,2/15||MP Memory Systems||Skim |
|2/17||MP Memory Systems||Read Ch. 2, Review |
|2/20, 2/22, 2/24||Coherence & Consistency||Read  Ch. 6-8|
|2/27, 3/1, 3/3||Coherence & Consistency||Read  Ch. 3-5, Review |
|3/8||Catchup, midterm review|
|3/13,3/15||Transactional Memory||Read  Ch. 1 & 5, Review |
|3/15,3/17||Interconnection Networks||Read ||Project proposal due 3/17|
|3/20,3/22,3/24||Spring Break||Read a novel, for fun!|
|3/27||Interconnection Networks||Review |
|3/29,3/31||SIMD and MPP||Read , Review |
|4/3, 4/5||Clusters and GPGPUs||Read Ch. 1 of |
|4/10, 4/12||Clusters and GPGPUs||Read Ch. 1-3, 5 of |
|4/14||Catchup and review|
|4/17||Midterm 2 in class|
|4/19,4/21||Class cancelled, project work||Project status report due 4/21|
|4/24,4/26,4/28||Class cancelled, project work|
|5/1, 5/3||Project talks||(see schedule below)|
|5/8||No final exam||Final project report due 5/8|
Updated as semester progresses
These are provided as additional reference material and are not required.
Please do not distribute these to students not enrolled for ECE 757!
To check your recorded exam, quiz, and paper review grades, log in to Learn@UW using your NetID and password (same as your as @wisc.edu email username or your my.wisc.edu login), click on "2017 - SPRING" and then ECE/CS 757.
For the course project you will do a research-focused project. This may involve reimplementing an idea proposed in a paper we read in the class (or outside of class) or trying something new that you have come up with. The following link includes some possible suggestions for both options.
You should work in a team of 3 students. Teams of 4 are also possible, but require broader scope.
You will be required to do the following for the final project: ul>
Note that originality is not required (however, it is encouraged) for the project, nor are "positive" results (in other words, you will not be penalized for finding that a proposed scheme does not work). You will be graded based on your effort and on the quality of your presentation and report.Suggested project topics
Here are some guidelines for the project report.
|Date & Time||Project Name||Team Members|
|5/1 1:00pm||Analysis of Sparse Convolutional Neural Networks||Sabareesh Ganapathy, Manav Garg, Prasanna Venkatesh Srinivasan||Slides|
|5/1 1:25pm||Binarized Neural Network on a CPU, GPU, and FPGA||Daniel Lerner, Jared Pierce, Blake Wetherton, Jialiang Zhang||Slides|
|5/1 1:50pm||Atomic Coherence and Neural Networks||Brian Guttag, Ravi Raju, Carly Schulz, Heng Zhuo||Slides|
|5/3 1:00pm||Reinforcement Learning For DRAM Controller Scheduling||Pavan Holla, Ayush Gupta, Rangapriya Parthasarathy||Slides|
|5/3 1:25pm||PInterNet||Shunmiao Xu, Preyas Shah, Rahul Nayar, Fan Wu||Slides|
|5/3 1:50pm||Everything you still don't know about synchronization and how it impacts scaling||Anshu Raina, Mohit Verma, Suhas Pai, Yuvraj Patel||Slides|
Note: if you have trouble accessing this page, contact Mikko Lipasti (firstname.lastname@example.org)